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PROCESSOR
Dual Intel® Xeon™
processors 2.4GHz and 2.8GHz*
HYPER-THREADING TECHNOLOGY
Intel's Hyper-Threading technology
makes a single Xeon processor appear as two logical
processors. The XPT's two physical Xeon processors will
function as four logical processors in applications
optimized for Hyper-Threading.
CHIPSET
Intel's E7501 chipset provides support
for dual Xeon processors, a 533 system bus, and PC1600
or PC2100 DDR memory with ECC.
SYSTEM BUS
The Intel E7501 chipset supports a
system bus speed of 533MHz.
BUS SPEED
| ISA |
16-bit/8MHz |
| PCI |
32-bit/33MHz or 64-bit/66MHz |
| PCI-X |
64-bit/66Mhz, 64-bit/100MHz
or 64bit/133MHz |
| Hub Link 2.0 |
1GB/s |
| System/FSB |
533MHz |
BIOS (FLASH)
AMIBIOS8® has built-in advanced CMOS
setup for system parameters, peripheral management for
configuring on-board peripherals, PCI-to-PCI
bridge support and PCI interrupt steering. Supports
flash devices for BIOS upgrading via floppy interface.
Also provides integrated support for USB mass storage
devices such as USB, CD-ROM, CD-RW, etc. Custom BIOSs
are available upon request.
CACHE MEMORY
Each Xeon processor supports a 512K
integrated on-die Advanced Transfer Cache (L2). The
cache is an 8-way set associative cache running at full
processor core frequency. The Execution Trace Cache
(L1) is a 12K data cache that stores thousands of decoded
micro-operations. The purpose of this L1 cache is to
remove decoder latency from the processor's main execution
path, resulting in increased processor performance.
DDR200/266 MEMORY
The DDR memory interface on the XPT
consists of two channels, each terminating at a pair
of DIMM module sockets. The XPT supports auto detection
of up to 8GB of memory. The system BIOS automatically
detects memory type, size and speed. The four memory
sockets on the SBC must be populated in pairs, beginning
with the sockets in Bank 1, and must contain ECC registered
PC1600 or PC2100 DIMMS. All DIMMS must be the same speed
(PC1600 or PC2100). The modules within a pair must be
the same size; however, if two pairs are used, each
pair can contain a different size module. The maximum
memory capacity of the XPT is 8GB and the minimum interface
bandwidth is 1600MB/s.
ERROR CHECKING AND CORRECTION
The memory interface supports ECC
modes via BIOS setting for multiple-bit error detection
and correction of all errors confined to a single nibble.
PCI-X BUS INTERFACE
The PCI-X bus interface supports a
64-bit PCI-X backplane interface running at either a
66MHz, 100MHz or 133MHz bus speed.
PCI BUS INTERFACE
The PCI bus interface supports either
a 32-bit/33MHz or a 64-bit/66MHz PCI backplane interface.
ISA BUS
The XPT provides a 16-bit ISA bus
interface to the backplane for legacy ISA slots.
SYSTEM HARDWARE MONITOR
The Winbond W83783S chip supports
hardware monitoring. The functions monitored are voltage,
fan speed and temperature. The XPT hardware monitor
software allows the user to program the monitor limits
to provide trigger points for the application software.
This allows the application program to monitor these
trigger points in order to send system alert messages
or perform corrective actions.
FLOPPY DRIVE INTERFACE
Supports up to two floppy disk drives
in combinations of 360K to 2.88MB.
ULTRA XGA VIDEO INTERFACE
The ATI M6-16H video controller enables
2D/3D video acceleration and provides 16MB of integrated
video DDR memory. The video controller supports pixel
resolutions up to 1600 x 1200. Software drivers are
available for most popular operating systems.
SERIAL INTERFACE
The Super I/O controller supports
two full-function serial ports with independently programmable
baud rates. The controller has two high-speed, NS16C550
compatible, UARTs with Send/Receive 16-Byte FIFOs. The
IRQ for each serial port has BIOS selectable addressing.
ENHANCED BI-DIRECTIONAL PARALLEL
INTERFACE
The parallel port interface is compatible
with IBM PC/XT®, PC/AT®, PS/2T, Enhanced Parallel Port
(EPP1.7, EPP1.9) and Extended Capabilities Port (ECP)
modes of operation. Both the EPP and ECP modes are IEEE
1284 compliant. The parallel port has BIOS selectable
addressing.
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DUAL ETHERNET INTERFACES
- 10/100/1000BASE-T
The XPT has an internal PCI-X bus
that connects to Intel's 82546GB Ethernet Controller
chip. This board design feature provides high-speed
dual Gigabit Ethernet on LAN ports 1 and 2. The XPT
also supports existing 10Mb or 100Mb per second Ethernet
networks over the same internal PCI-X bus. RJ-45 connectors
located on the I/O bracket provide the mechanical interface
to the Ethernet networks.
DUAL ULTRA320 SCSI INTERFACES
The Ultra320 SCSI interfaces use a
dual-channel Adaptec AIC-7902BR SCSI controller chip.
The SCSI interfaces use the SBC's internal PCI-X bus
to maximize device data transfer speeds. The maximum
data transfer speed is 320MB/s, and up to 15 SCSI devices
per interface are supported. The interfaces comply with
the SPI-3 standard and are compatible with both single-ended
and Low Voltage Differential (LVD) SCSI I/O. Software
drivers are available for most popular operating systems.
The SBC is available without the SCSI interfaces.
EIDE ULTRA ATA/100 INTERFACES
(DUAL)
Dual high-performance PCI Bus Master
EIDE interfaces are capable of supporting up to two
IDE disk drives each in a master/slave configuration.
The interface supports Ultra ATA/100 with synchronous
ATA mode transfers up to 100MB per second.
WATCHDOG TIMER
The programmable watchdog timer provides
a system reset with a total range of 30ms to 60 seconds.
The programmable increments of the watchdog are 30ms,
10s and 60s.
KEYBOARD AND PS/2 MOUSE INTERFACES
The mini DIN connector located on
the I/O bracket provides an external interface for a
PS/2 mouse and keyboard. A "Y" adapter plugged into
the mini DIN connector allows the PS/2 mouse and keyboard
to share the same port. Internal PS/2 mouse and keyboard
headers are also available. A self-resetting fuse protects
the +5V line of the keyboard and the mouse.
POWER REQUIREMENTS
Typical Values
| CPU |
+5V* |
+12V** |
+3.3V* |
| 2.8GHz |
4.10A |
13.15A |
1.41A |
| 2.4GHz |
4.10A |
9.90A |
1.40A |
-12V @ <100mA*
* From Backplane via PICMG® Connector.
** From ATX12V power supply or equivalent via P24 connector.
The Xeon processor's power requirements created the need
for an additional on-board 4-pin power connector (P24).
This connector requires +12V from an external power supply
that conforms to the ATX12V power specification.
This external power supply should have a minimum wattage
rating of at least 250W. The XPT also requires that 3.3V
be applied to the backplane from the power supply.
POWER FAIL DETECTION
The XPT continuously monitors the
incoming +5V and +3.3V power lines from the system backplane.
If the +5V line drops below 4.75 volts or the +3.3V
line drops below 2.97 volts, the XPT issues a hardware-reset
command. This feature helps maintain control and allows
the system to automatically restart. A two-pin header
is available for applications that require an external
reset switch. On-board power lines are also monitored
in a similar fashion.
BATTERY
Built-in lithium battery for data
retention of CMOS memory.
TEMPERATURE/ENVIRONMENT
| Operating Temperature: |
0° - 45° C |
| Storage Temperature: |
-40° to 70° C. |
| Humidity: |
5% to 90% non-condensing |
A Xeon processor can consume as much
as 70 Watts of power on the XPT. The XPT's cooling system
consists of an air duct assembly attached to the SBC,
a high-reliability cooling fan mounted to the air duct
intake, and passive heat sinks mounted to each processor.
The fan maintains air movement over the processors' passive
heat sinks and the air duct assembly directs the airflow
over critical components. Warm air is exhausted from vents
located on the SBC's I/O bracket. Click for the XPT
Cooling System White Paper.
MECHANICAL
In a typical PCI/ISA backplane, the
XPT's air duct design enables placement of half-size
PCI cards approximately 2.3" (58.4mm) or three slots
away from the SBC. Full-length cards can be placed four
slots away in the backplane or approximately 3.2" (81.3mm)
from the XPT.
STANDARDS
- IEEE P996, Personal Computer
Bus Standard
- PCI Local Bus Specification 2.1
- PICMG® 1.0 Specification
- PCI-SIG, PCI-X Addendum to the PCI Local Bus
Specification, Revision 1.0b
MEAN TIME BETWEEN FAILURES (MTBF)
121,000 POH (Power-On Hours)
at 400 C., per Bellcore
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